1. Field of the Invention
This invention relates to a semiconductor memory device and particularly, to a semiconductor memory device with a dielectric film made of a high dielectric-constant film material or ferroelectric film material.
2. Description of the Related Art
In recent years, developments have been made of semiconductor memory devices with a dielectric film having a high dielectric constant compared to a silicon oxide film or with a ferroelectric film having a spontaneous polarization characteristic. As high dielectric-constant materials, there can be exemplified STO (SrTiO3, strontium titanate), BSTO ((Ba, Sr)TiO3, barium strontium titanate) and so forth. As ferroelectric materials, there can be exemplified PZT (Pb(Zr, Ti)O3, lead titanate zirconate), PLZT ((Pb, La) (Zr, Ti)O3, lead lanthanum zirconate titanate), SBT (SrBi2Ta2O9, strontium bismuth tantalate) and so forth. As fabrication methods for thin films of the above-mentioned materials, there can be exemplified a sol-gel processing method, an MOD (Metal Organic Decomposition) method, a rotary coating method, a sputtering method and an MOCVD (Metal Organic Chemical Vapor Decomposition) method and so forth.
High dielectric-constant materials such as STO and BSTO can be produced at a comparatively low temperature of the order from 300xc2x0 C. to 600xc2x0 C. Further, PZT, which is a perovskite structure oxide of a ferroelectric material, can also be produced at a comparatively low temperature of about 600xc2x0 C. However, a material containing lead as a constituent element, such as PZT, has had a problem: Defects generate in a film of the material during deposition because of evaporation of lead due to high vapor pressures of lead element and an oxide thereof and pin holes are also simultaneously formed in a worse case. As a result, leakage currents from a memory cell increases and when inversion of polarization is repeated million to hundred million times, there arises problematically a kind of fatigue phenomenon of reduction in magnitude of spontaneous polarization. Particularly, in the field of FeRAM constituted of ferroelectric nonvolatile memory, therefore, a ferroelectric film with less of the fatigue phenomenon during the use over time is sought.
On the other hand, development of bismuth layered structure compounds has been in progress. The bismuth layered structure compounds were discovered by Smolenskii et al. in 1959, which is disclosed in G. A. Smolenskii, V. A. Isupov and A. I. Agranovskaya, Soviet Phys. Solid State (USSR), 1 (1959), p. 149 and thereafter, a detailed investigation has been further conducted by Subbarao, which is disclosed in E. C. Subbarao, J. Phys. Chem. Solids (USA), 23 (1962), p. 665. Brsides, Carlos A. Paz de Araujo et al. have uncovered that an SBT film of the bismuth layered structure compounds is suited for FeRAM and has reported an excellent anti-fatigue characteristic that no change occurs in characteristics especially after repetitions of polarization inversion in more than trillion times. In addition, an electric field of an SBT film required for inversion of polarization is low compared with a PTZ film, the SBT film is especially suitable for a highly integrated FeRAM with a decreased drive voltage. In formation of the SBT film, however, a problem has remained since a high temperature process of the order from 700xc2x0 C. to 800xc2x0 C. is required.
Then, description will be given of an example of a conventional semiconductor memory device with reference to a simplified, sectional view of a construction thereof of FIG. 5.
As shown in FIG. 5, an inter-element isolation oxide film 112 is formed on a semiconductor substrate (for example, a first conductivity type silicon substrate) 111 to isolate element formation regions. In an element formation region, a transistor 121 is formed. The transistor 121 is constructed of a gate oxide film 122 formed on the semiconductor substrate 111, a polysilicon word line (including a gate electrode) 123 formed on the gate oxide film 122, and impurity diffusion regions 124 and 125 of the first conductivity type and a second conductivity type of an opposite polarity therefrom formed on respective both sides of the gate electrode portion on the semiconductor substrate 111. A side wall insulation film 126 is formed on a side wall of the polysilicon word line 123.
An interlayer insulation film 113 covering the transistor 121 is formed on the semiconductor substrate 111. In the interlayer insulation film 113, a contact hole 114 reaching the impurity diffusion region 124 is formed and in the inside of the contact hole 114, there is formed a conductive plug 115 of a memory cell section, connected to the impurity diffusion region 124.
On the interlayer insulation film 113, a lower electrode 132 of a dielectric capacitor 131 connected to the conductive plug 115, a dielectric film 133 and an upper electrode 134 are stacked. The dielectric capacitor 131 is covered with an interlayer insulation film 116 and an opening 117 is formed on the upper electrode 134 of the dielectric capacitor 131. Further, there is provided a plate line 141 connected to the upper electrode 134 through the opening 117.
Still further, there is provided an interlayer insulation film 118 covering the plate line 141. In the interlayer insulation films 118, 116 and 113, a bit contact hole 119 reaching the other impurity diffusion region 125 is formed and through the bit contact hole 119, there is formed a bit line 142 connected to the second conductivity type impurity diffusion region 125.
A semiconductor device 110 with a dielectric capacitor 131 using the dielectric film 133 made of a conventional high dielectric-constant material or a ferroelectric material, as mentioned above, adopts a stacked structure in which the ferroelectric capacitor 131 constructed of the lower electrode 132, the ferroelectric film 133 and the upper electrode 134 is formed on the transistor 121. With this stacked structure adopted, a memory cell region is reduced in area, thereby making a high degree of integration possible. In order to realize such a stacked structure, a requirement is a plug structure using a conductive plug to connect between the transistor (selection transistor) 121 and the dielectric capacitor 131.
As materials of the lower electrode of a dielectric capacitor, there have been used noble metals such as platinum, iridium and ruthenium from the standpoint of resistances to oxidation, reaction and so forth.
In a process of formation of a high dielectric-constant film or a ferroelectric film used in a dielectric capacitor, a treatment in a high temperature oxidative atmosphere at a temperature in the range of from 500xc2x0 C. to 800xc2x0 C. is indispensable in order to attain a high dielectric constant or ferroelectricity through crystallization. There have been arisen various problems in the course of commercialization of highly integrated semiconductor memory device with such a dielectric capacitor since, at a high temperature in a process of formation of a dielectric film, a lower noble metal electrode of the dielectric capacitor and polysilicon plug or tungsten plug are reacted with each other; a plug is oxidized to cause defective contact; a noble metal, constituent elements in the dielectric film or the like diffuse into a substrate to deteriorate transistor characteristics; or to cause other inconveniences. Therefore, there has been a necessity to provide a conductive, diffusion barrier layer being thermally stable and serving as a strong barrier against oxygen atoms and constituent elements of the plug and the lower electrode, between the plug and the lower noble metal electrode.
In general, while titanium nitride has thus far used as a material for the diffusion barrier layer, problems have occurred since the titanium nitride is oxidized in a heat treatment in a high temperature oxidative atmosphere to deteriorate conductance, causes peeling or have the like faults. Further, oxygen, silicon, noble metals, lead, bismuth or the like elements are easy to diffuse along columnar grain boundaries. Therefore, a problem has occurred in efforts to attain a sufficient barrier effect, since a layer thickness is required to be equal to or more than 200 nm, which makes a stepwise rise of the dielectric capacitor higher, thereby hindering higher degree of integration. Still further, when the heat treatment temperature is lowered such that the above-mentioned problems are prevented from occurring, different problems occur instead since neither of a sufficient dielectric constant and a sufficient ferroelectricity is achieved, a leakage current increases, together with other poor performance, any of which makes high reliability impossible to attain.
Further, in order to solve the above-mentioned problems, a trial has been conducted in which tantalum nitride silicide (TaSiN) is used as a amorphous diffusion barrier with no grain boundary instead of titanium nitride and iridium is used as a noble metal to improve heat resistance, which is disclosed in J. Kudo et al., IEEE IEDM Technical Digest, p. 609, (1997). In this case, however, a total film thickness of the lower electrode is as thick as 200 nm to 300 nm and on top of this, a heat resistance is limited to the order of 700xc2x0 C., which is insufficient for a highly integrated FeRAM as with a SBT film.
The invention relates to a semiconductor memory device and a fabrication method therefor that are provided in order to solve the above-mentioned problems.
The invention is directed to a semiconductor memory device comprising: a dielectric capacitor obtained by stacking a first electrode, a dielectric film and a second electrode; and a conductive plug connected to the first or second electrode of the dielectric capacitor, wherein an electrode of the first and second electrodes, connected to the conductive plug includes a metal suboxide layer with conductiveness and a diffusion barrier layer blocking diffusion of oxygen, and the metal suboxide layer and the diffusion barrier layer are stacked in the order from the conductive plug side of the electrode connected to the conductive plug.
In the above-mentioned semiconductor memory device, an electrode of the first and second electrodes, connected to the conductive plug includes the metal suboxide layer with conductiveness and the diffusion barrier layer blocking diffusion of oxygen and the stacking is conducted in the order of the metal suboxide layer and the diffusion barrier layer, starting from the conductive plug side of the electrode connected to the conductive plug. Hence, although the dielectric film is formed, for example, in a high temperature oxidative atmosphere, the diffusion of oxygen into the metal suboxide layer is blocked by the diffusion barrier layer. Therefore, since oxidation of the metal suboxide layer does not progress any further beyond a state of oxidation when the metal suboxide layer is formed, not only is a reaction between oxygen in the metal suboxide layer and the conductive plug or the like prevented from occurring, but sufficient conductance of the metal suboxide layer can also be retained after the dielectric film is formed. Even when the conductive plug is especially formed with a silicon based material such as polysilicon, no reaction between oxygen in the metal suboxide layer and silicon in the silicon based material occurs and therefore, no silicon oxide is produced, thereby causing no poor conductance.
The invention is directed to a fabrication method for a semiconductor memory device comprising:
a step of forming a contact hole in an interlayer insulation film formed on a substrate and forming a conductive plug in the contact hole;
a step of forming a first electrode connected to the conductive plug on the interlayer insulation film and then stacking a dielectric film and a second electrode on the first electrode to form a dielectric capacitor; and
a step of forming a metal suboxide layer with conductiveness and a diffusion barrier layer blocking diffusion of oxygen starting from a side of the first electrode to which side the conductive plug is connected.
In the above-mentioned fabrication method for a semiconductor memory device, since the metal suboxide layer with conductiveness and the diffusion barrier layer blocking diffusion of oxygen are formed starting from a side of the first electrode constituting the dielectric capacitor to which side the conductive plug is connected, therefore, even if the dielectric film is formed in a high temperature oxidative atmosphere after forming the suboxide layer and the diffusion barrier layer, diffusion of oxygen into the metal suboxide layer is prevented from occurring by the diffusion barrier layer, with the result that the metal suboxide layer is not oxidized any further beyond before formation of the dielectric film and thereby not only is a reaction between oxygen in the metal suboxide film and the conductive plug prevented from occurring, but the metal suboxide layer can retain sufficient conductance after the dielectric film is formed as well. Especially, even when the conductive plug is formed with a silicon based material such as polysilicon, no reaction occurs between oxygen in the metal suboxide layer and silicon in the silicon based material and no silicon oxide film is produced, thereby causing no poor conductance.
Further, as metals for the metal suboxide layer, there are especially selected metals such as titanium, vanadium, chromium, iron and rhenium, free energy of formation of each of whose oxides is smaller than that of silicon oxide and whose oxides have a conductiveness and thereby, not only can oxidation of the conductive plug be prevented from occurring but sufficient conductance thereof is also ensured.